A 7-GHz Fast-Lock 2-Step TDC-based All-Digital DLL for Post-DDR4 SDRAMs
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Dongjun | - |
dc.contributor.author | D. | - |
dc.contributor.author | Kim, Jongsun | - |
dc.contributor.author | J. | - |
dc.date.available | 2021-03-17T08:42:57Z | - |
dc.date.created | 2021-02-26 | - |
dc.date.issued | 2018 | - |
dc.identifier.issn | 0271-4302 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/13037 | - |
dc.description.abstract | A new high-speed, low-power, and fast-lock alldigital delay-locked loop (DLL) for high-speed next-generation memory interface is presented. The proposed all-digital DLL utilizes a new 2-step time-to-digital converter (TDC) scheme which results in a fast-locking time of only 6 clock cycles, regardless of the long replica clock buffer (RCB) delay located in the feedback path of the DLL. The proposed DLL is designed in a 65 nm CMOS process, and it achieves a wide operating frequency range of 1.65-7.0 GHz without any harmonic lock problems. The proposed DLL dissipates 7.1 mW of power from a 1.0 V supply, achieves an effective peak-to-peak jitter of 4.55 ps at 7 GHz, and occupies an area of 0.02 mm(2). | - |
dc.publisher | IEEE | - |
dc.title | A 7-GHz Fast-Lock 2-Step TDC-based All-Digital DLL for Post-DDR4 SDRAMs | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Jongsun | - |
dc.identifier.doi | 10.1109/ISCAS.2018.8351396 | - |
dc.identifier.scopusid | 2-s2.0-85057123351 | - |
dc.identifier.wosid | 000451218702081 | - |
dc.identifier.bibliographicCitation | Proceedings - IEEE International Symposium on Circuits and Systems, v.2018-May | - |
dc.relation.isPartOf | Proceedings - IEEE International Symposium on Circuits and Systems | - |
dc.citation.title | Proceedings - IEEE International Symposium on Circuits and Systems | - |
dc.citation.volume | 2018-May | - |
dc.type.rims | ART | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | DLL | - |
dc.subject.keywordAuthor | SDRAM | - |
dc.subject.keywordAuthor | DDR | - |
dc.subject.keywordAuthor | DDR3 | - |
dc.subject.keywordAuthor | DDR4 | - |
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