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Modeling and Separate Extraction of Gate-Bias- and Channel-Length-Dependent Intrinsic and Extrinsic Source-Drain Resistances in MOSFETs

Authors
Bae, HagyoulJang, JaemanShin, Ja SunYun, DaeyounLee, JieunKim, Tae WanKim, Dae HwanKim, Dong Myong
Issue Date
Jun-2011
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Drain resistance; extraction; extrinsic; intrinsic resistance; MOSFET; parasitic resistance; source resistance
Citation
IEEE ELECTRON DEVICE LETTERS, v.32, no.6, pp.722 - 724
Journal Title
IEEE ELECTRON DEVICE LETTERS
Volume
32
Number
6
Start Page
722
End Page
724
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/19875
DOI
10.1109/LED.2011.2131116
ISSN
0741-3106
Abstract
A new technique for a separate extraction of the current-path-dependent resistance (R(SD0)) from the contact-dependent source and drain resistances (R(Se) and R(De)) is reported for a single MOSFET. We also report a technique for a separation of V(GS)-dependent source and drain resistance (R(SDi)) from the V(GS)- and L(eff)-dependent channel resistance (R(ch)) with multiple MOSFETs. We confirm the proposed techniques applied to n-channel MOSFETs with various W/L combinations and obtain R(Se) = 10.5-12.4 Omega, R(De) congruent to 12.7 Omega, and R(SD0) = 4.7 Omega for W = 10 mu m. V(GS)-dependent but L-independent R(SDi) is extracted to be 2.8-4.2 Omega.
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