Janus-FTL: Finding the optimal point on the spectrum between page and block mapping schemes
- Authors
- Kwon, H.; Kim, E.; Choi, J.; Lee, D.; Noh, S.H.
- Issue Date
- 2010
- Keywords
- Block mapping; Cost model; Janus-FTL; Page mapping; SSD
- Citation
- Embedded Systems Week 2010 - Proceedings of the 10th ACM International Conference on Compilers, Architecture and Synthesis for Embedded Systems, EMSOFT'10, pp.169 - 178
- Journal Title
- Embedded Systems Week 2010 - Proceedings of the 10th ACM International Conference on Compilers, Architecture and Synthesis for Embedded Systems, EMSOFT'10
- Start Page
- 169
- End Page
- 178
- URI
- https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/21644
- DOI
- 10.1145/1879021.1879044
- ISSN
- 0000-0000
- Abstract
- NAND flash memory based storage such as SSDs is gaining popularity in commodity computer systems. Some low-end SSDs use the block mapping FTL (Flash Translation Layer) that is good for sequential write patterns but poor for random ones. On the other hand, high-end SSDs tend to use the page mapping FTL that is effective for random write patterns, but whose performance degrades after successive random writes. Designing an FTL that adapts to various workload patterns and provides long-term stable performance is a challenging issue. To resolve this issue, we propose a new FTL, which we call Janus-FTL, that provides a spectrum between the block and page mapping schemes. By adapting along the spectrum, Janus-FTL can provide long-term superior write performance for various workload patterns. We also present a cost model of Janus-FTL that shows the existence of the optimal point on the spectrum for a given workload. Our experimental results show the superiority of Janus-FTL, which adapts itself along the spectrum for a given workload, over state-of-the-art hybrid mapping FTLs and the pure page mapping FTL.
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Collections - College of Engineering > Computer Engineering Major > 1. Journal Articles
- College of Engineering > Computer Engineering > Journal Articles
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