Pentacene-based low-leakage memory transistor with dielectric/electrolytic/dielectric polymer layers
- Authors
- Choi, Wonjun; Noh, Seok Hwan; Hwang, D. K.; Ch, Jeong-M.; Jang, Sungjin; Kim, Eugene; Im, Seongil
- Issue Date
- 2008
- Publisher
- ELECTROCHEMICAL SOC INC
- Citation
- ELECTROCHEMICAL AND SOLID STATE LETTERS, v.11, no.3, pp.H47 - H50
- Journal Title
- ELECTROCHEMICAL AND SOLID STATE LETTERS
- Volume
- 11
- Number
- 3
- Start Page
- H47
- End Page
- H50
- URI
- https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/23509
- DOI
- 10.1149/1.2822888
- ISSN
- 1099-0062
- Abstract
- We report on the pentacene memory thin-film transistors (TFTs) with a poly-4-vinylphenol (PVP)/poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]/PVP triple-layer gate insulator. The top PVP dielectric in the triple layer was intended to provide a smooth hydrophobic surface to ensure good crystalline growth of pentacene channel, while the bottom PVP was for leakage protection. The middle P(VDF/TrFE) layer, known as ferroelectric material, revealed an electrolytic or ion movement signature rather than ferroelectric in our sandwich form of organic insulator. Our TFTs showed remarkably reduced leakage current, good memory window (large threshold voltage shift under slow gate-bias swing), and good field-effect mobility (0.2 cm(2)/V s). Retention time for the electrolytic memory effects was measured to be more than 10(4) s under a constant-read condition. (c) 2007 The Electrochemical Society.
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