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ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators

Authors
Noh, Seok HwanChoi, WonjunOh, Min SukHwang, D. K.Lee, KimoonIm, SeongilJang, SungjinKim, Eugene
Issue Date
18-Jun-2007
Publisher
AMER INST PHYSICS
Citation
APPLIED PHYSICS LETTERS, v.90, no.25
Journal Title
APPLIED PHYSICS LETTERS
Volume
90
Number
25
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/23571
DOI
10.1063/1.2749841
ISSN
0003-6951
Abstract
The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm(2)/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDF/TrFE). The retention of the device lasted over 2 h.(c) 2007 American Institute of Physics.
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