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Bump formation and flip chip processes for RF system-on-packages
- Authors
- Jung, B.-Y.; Choi, E.-K.; Jeon, Y.-S.; Lee, K.-Y.; Seo, K.-K.; Oh, T.-S.
- Issue Date
- 2007
- Publisher
- Trans Tech Publications Ltd
- Keywords
- Bump; Electronic package; Flip chip; RF package; SOP
- Citation
- Solid State Phenomena, v.124-126, no.PART 1, pp.25 - 28
- Journal Title
- Solid State Phenomena
- Volume
- 124-126
- Number
- PART 1
- Start Page
- 25
- End Page
- 28
- ISSN
- 1012-0394
- Abstract
- For flip-chip process of RF system-on-packages(SOP), double bump bonding processes were investigated. Sn-Ag and Sn solder joints were formed by the reflowed double bumping process, and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sn solder joints was about 13mΩ which was much lower than 24-33mΩ of the non-reflowed Sn/In/Sn bump joints. The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the non-reflowed double bump bonding.
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