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A defect-tolerant molecular-based memory architecture

Authors
Choi, Y.-H.Lee, M.-H.
Issue Date
2007
Publisher
IEEE COMPUTER SOC
Citation
Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp.143 - 151
Journal Title
Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Start Page
143
End Page
151
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/24281
DOI
10.1109/DFT.2007.22
ISSN
1550-5774
Abstract
This paper presents a defect-tolerant architecture for molecular-based memories. A memory is designed from multiple modules that share the same address space, where each of the modules is constructed as a molecular-based crossbar array. Redundant rows and columns of each crossbar array and redundant modules with a proper assignment of control variables are utilized to tolerate defects generated during the fabrication process and faults occurring during normal operation. The crossbar area required for the molecular memory can be made smaller than those of existing schemes, while achieving higher memory configurability. An extensive simulation demonstrates that the proposed memory architecture outperforms existing molecular-based redundant memory architectures for a wide range of defect rates.© 2007 IEEE.
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