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Via/hole filling by pulse-reverse copper electroplating for 3D SiP

Authors
Chang, Gun-HoChang, Si-YoungLee, Jae-Ho
Issue Date
2006
Publisher
TRANS TECH PUBLICATIONS LTD
Keywords
electroplating; pulse plating; via filling; SiP; additive
Citation
ECO-MATERIALS PROCESSING & DESIGN VII, v.510-511, pp.942 - 945
Journal Title
ECO-MATERIALS PROCESSING & DESIGN VII
Volume
510-511
Start Page
942
End Page
945
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/24625
DOI
10.4028/www.scientific.net/MSF.510-511.942
ISSN
0255-5476
Abstract
Copper via filling is an important factor in 3D stacking interconnection of Sip (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The size of 50, 70, 100 mu m in diameter and 100 mu m in height. The holes were prepared by DRIE method. TaN and Ta was sputtered for copper diffusion barrier. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of the via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were successfully obtained.
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