New Precharge-free and Low-power Matchline Structure of Content Addressable Memory

Abstract

Content-Addressable Memory (CAM) is a high-speed search engine based on parallel search. However, the parallel search method is inefficient in terms of power consumption, so CAM is currently only used in certain applications. Therefore, many designs for low power operation have been reported. Matchline (ML) has two structures, NOR type and NAND type, and is a parallel search method suitable for high speed and low power, respectively. However, each ML structure has drawbacks. Among them, in NAND-type, there is a problem to be solved low noise margin due to the pass transistor. In this paper, we present an architecture that achieves both high-speed and low-pow er-consumption by eliminating precharge with a NAND-type ML structure suitable for low-power designs. As a result of circuit simulation in 65-nm process, delay and power reduced up to 13% and 25x, respectively.