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Minimizing Total Wire Length by Flipping Modules

Authors
Chong, K.Sahni, S.
Issue Date
1993
Citation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.12, no.1, pp.167 - 175
Journal Title
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume
12
Number
1
Start Page
167
End Page
175
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/28078
DOI
10.1109/43.184854
ISSN
0278-0070
Abstract
We consider the problem of flipping modules about their horizontal and/or vertical axes so as to minimize the estimated total wire length. Polynomial time algorithms are proposed for some classes of module layouts. Further, it is shown that a simple greedy heuristic often outperforms the neural network and simulated annealing heuristics proposed earlier for this problem. © 1993 IEEE
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