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Bump formation and flip chip processes for RF system-on-packages

Authors
Jung, Boo-YangChoi, Eun-KyoungJeon, Young-SooLee, Kwang-YongSeo, Kwang-SeokOh, Tae-Sung
Issue Date
2007
Publisher
TRANS TECH PUBLICATIONS LTD
Keywords
flip chip; SOP; RF package; bump; electronic package
Citation
ADVANCES IN NANOMATERIALS AND PROCESSING, PTS 1 AND 2, v.124-126, pp.25 - +
Journal Title
ADVANCES IN NANOMATERIALS AND PROCESSING, PTS 1 AND 2
Volume
124-126
Start Page
25
End Page
+
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/29931
DOI
10.4028/www.scientific.net/SSP.124-126.25
ISSN
1012-0394
Abstract
For flip-chip process of RF system-on-packages(SOP), double bump bonding processes were investigated. Sn-Ag and Sri solder joints were formed by the reflowed double bumping process, and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sri solder joints was about 13m Omega which was much lower than 24 similar to 33m Omega of the non-reflowed Sn/In/Sn bump joints. The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the non-reflowed double bump bonding.
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