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Impact of contact resistance on memory window in phase-change random access memory (PCRAM)

Authors
An, Jun-seopChoi, Chul-minShindo, SatoshiSutou, YujiKwon, Yong-wooSong, Yun-heub
Issue Date
Dec-2016
Publisher
SPRINGER
Keywords
PCRAM; Contact resistance; Memory window; GST; Contact resistivity; Reset operation current
Citation
JOURNAL OF COMPUTATIONAL ELECTRONICS, v.15, no.4, pp.1570 - 1576
Journal Title
JOURNAL OF COMPUTATIONAL ELECTRONICS
Volume
15
Number
4
Start Page
1570
End Page
1576
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/7073
DOI
10.1007/s10825-016-0905-3
ISSN
1569-8025
Abstract
This paper investigates the impact of contact resistance on the memory window in phase-change random access memories (PCRAMs) using (GST). We discuss the increase of contact resistance, as device is scaled down to a nanometer size and the effects of contact resistivity changes with respect to the resistance window between the set and reset states. In a contact area of , the contact resistance in the set state occupies more than 80 % of the total resistance, and the occupied area increases as the contact area is scaled upward. The memory window is significantly degraded as the set resistance increases because of the increasing contact resistance. To maintain the memory window with more than two orders of magnitude of the resistance in a area, the contact resistance should be decreased to less than 60 % of that of a area by reducing contact resistivity or by some other method. We examine the reduction of contact resistance achieved by adopting a three-dimensional contact structure, and we propose this structure as a candidate for the scaled PCRAM.
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