Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

Multibit Recoding 기법과 Redundant Binary 연산을 이용한 병렬 승산기 설계A Design of parallel multiplier using multibit recoding and redundant binary arithmetic

Other Titles
A Design of parallel multiplier using multibit recoding and redundant binary arithmetic
Authors
SHIN, KYUNG-WOOK
Issue Date
Sep-2000
Publisher
금오공대 산업기술개발연구원
Citation
산업기술개발연구, v.16, no.3, pp.223 - 232
Journal Title
산업기술개발연구
Volume
16
Number
3
Start Page
223
End Page
232
URI
https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/17540
Files in This Item
There are no files associated with this item.
Appears in
Collections
School of Electronic Engineering > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher Shin, Kyung Wook photo

Shin, Kyung Wook
College of Engineering (School of Electronic Engineering)
Read more

Altmetrics

Total Views & Downloads

BROWSE