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Low Hardware Complexity QCA Decoding Architecture Using Inverter ChainLow Hardware Complexity QCA Decoding Architecture Using Inverter Chain
- Other Titles
- Low Hardware Complexity QCA Decoding Architecture Using Inverter Chain
- Authors
- 전준철
- Issue Date
- Apr-2016
- Publisher
- SERSC
- Citation
- International Journal of Control and Automation, v.9, no.4, pp 347 - 358
- Pages
- 12
- Journal Title
- International Journal of Control and Automation
- Volume
- 9
- Number
- 4
- Start Page
- 347
- End Page
- 358
- ISSN
- 2005-4297
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- There are no files associated with this item.
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Collections - Department of Computer Engineering > 1. Journal Articles
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