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Work-in-progress: Improving NVMe SSD I/O determinism with PCIe virtual channel

Authors
Kim, S.[Kim, S.]Yang, J.-S.[Yang, J.-S.]
Issue Date
2017
Publisher
Association for Computing Machinery, Inc
Citation
Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017
Journal Title
Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/32900
DOI
10.1145/3125501.3125520
ISSN
0000-0000
Abstract
NVMe SSD over PCIe is attractive since it provides high throughput and low latency. However, complex internal SSD operations may cause a non-deterministic I/O latency which is one of the most important factors in a storage system. While conventional approaches to enhance I/O latency prediction are based on host systems, this paper proposes a novel SSD-based deterministic latency enhancement scheme. The proposed method exploits the fact that multiple virtual channels can be utilized. For each virtual channel, the proposed method assigns a different priority for data transmission. NVMe SSD analyses its internal latency and dynamically chooses the virtual channels to compensate the latency. The experimental results show that, using a PCIe switch model, the proposed method can save 41.6% of the latency for each transaction layer packet. © 2017 Association for Computing Machinery.
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