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Voltage and Frequency Tuning Methodology for Near-Threshold Manycore Computing using Critical Path Delay Variation

Authors
Li C.-L.[Li C.-L.]Kim H.J.[Kim H.J.]Heo S.W.[Heo S.W.]Han T.H.[Han T.H.]
Issue Date
Dec-2015
Publisher
대한전자공학회
Keywords
Near-threshold computing; super-threshold computing; process variation; voltage and frequency tuning; multiple-voltage multiple-frequency
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.15, no.6, pp.678 - 684
Indexed
SCIE
SCOPUS
KCI
Journal Title
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
Volume
15
Number
6
Start Page
678
End Page
684
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/42276
DOI
10.5573/JSTS.2015.15.6.678
ISSN
1598-1657
Abstract
Near-threshold computing (NTC) is now regarded as a promising candidate for innovative power reduction, which cannot be achieved with conventional super-threshold computing (STC). However, performance degradation and vulnerability to process variation in the NTC regime are the primary concerns. In this paper, we propose a voltage-and frequency-tuning methodology for mitigating the process-variation-induced problems in NTC-based manycore architectures. To implement the proposed methodology, we build up multiple-voltage multiple-frequency (MVMF) islands and apply a voltage-frequency tuning algorithm based on the critical-path monitoring technique to reduce the effects of process variation and maximize energy efficiency in the post-silicon stage. Experimental results show that the proposed methodology reduces overall power consumption by 8.2-20.0%, compared to existing methods in variation-sensitive NTC environments.
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