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Dual Bias Modulator for Envelope Tracking and Average Power Tracking Modes for CMOS Power Amplifier

Authors
정해련[정해련]배종석[배종석]임원섭[임원섭]황금철[황금철]이강윤[이강윤]박천석[박천석]양영구[양영구]함정현[함정현]
Issue Date
2014
Publisher
대한전자공학회
Keywords
Power amplifier; dual-mode bias modulator; envelope tracking; average power tracking; long-term evolution
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.14, no.6, pp.802 - 809
Indexed
SCIE
SCOPUS
KCI
Journal Title
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
Volume
14
Number
6
Start Page
802
End Page
809
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/55154
ISSN
1598-1657
Abstract
This paper presents a dual-mode bias modulator (BM) for complementary metal oxide semiconductor (CMOS) power amplifiers (PAs). The BM includes a hybrid buck converter and a normal buck converter for an envelope tracking (ET) mode for high output power and for an average power tracking (APT) mode for low output power, respectively. The dual-mode BM and CMOS PA are designed using a 0.18-m CMOS process for the 1.75 GHz band. For the 16-QAM LTE signal with a peak-to-average power ratio of 7.3 dB and a bandwidth of 5 MHz, the PA with the ET mode exhibited a power-added efficiency (PAE) of 39.2%, an EVM of 4.8%, a gain of 19.0 dB, and an adjacent channel leakage power ratio of -30 dBc at an average output power of 22 dBm, while the stand-alone PA has a PAE of 8% lower at the same condition. The PA with APT mode has a PAE of 21.3%, which is an improvement of 13.4% from that of the stand-alone PA at an output power of 13 dBm.
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