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Detection of Field Failure Chips by Ensemble Learned from Different Chip Areas

Authors
Kim, M.-S.[Kim, M.-S.]Lee, J.-S.[Lee, J.-S.]Chun, J.-H.[Chun, J.-H.]
Issue Date
2021
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
Chip area; Class imbalance; Ensemble learning; Field failure detection; Semiconductor manufacturing
Citation
2021 IEEE Microelectronics Design and Test Symposium, MDTS 2021
Indexed
SCOPUS
Journal Title
2021 IEEE Microelectronics Design and Test Symposium, MDTS 2021
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/93141
DOI
10.1109/MDTS52103.2021.9476101
ISSN
0000-0000
Abstract
Defect detection using machine learning techniques in semiconductor manufacturing has been known to be a very difficult problem owing to two issues: a very smaller number of defectives compared to the number of well-functioning chips and an invisible feature difference between fail and pass chips. The former corresponds to the class imbalance problem and the latter implies the class overlap in the context of classification. This research attempts to overcome these difficulties by proposing a new ensemble learned from different chip areas. Considering that physically close chips each other have similar characteristics, we split a wafer into radial and pie-shaped areas and construct an ensemble of classifiers, where each of those is learned from only one area data. The intuition behind this idea is that the fail and the pass classes can be separable in a specific area, which would be beneficial to successful failure detection. The numerical experiments based on three real world datasets from a semiconductor manufacturer verified the effectiveness of the proposed method. © 2021 IEEE.
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Information and Communication Engineering > Department of Semiconductor Systems Engineering > 1. Journal Articles
Engineering > Department of Systems Management Engineering > 1. Journal Articles

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