mRT-PLRU: A General Framework for Real-Time Multitask Executions on NAND Flash Memory
DC Field | Value | Language |
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dc.contributor.author | Lee, Duhee | - |
dc.contributor.author | Kim, Jong-Chan | - |
dc.contributor.author | Lee, Chang-Gun | - |
dc.contributor.author | Kim, Kanghee | - |
dc.date.available | 2018-05-09T14:12:36Z | - |
dc.date.created | 2018-04-17 | - |
dc.date.issued | 2013-04 | - |
dc.identifier.issn | 0018-9340 | - |
dc.identifier.uri | http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/11296 | - |
dc.description.abstract | This paper proposes a novel technique called mRT-PLRU (Multitasking Real-Time constrained combination of Pinning and LRU), which forms a generic framework to use inexpensive nonvolatile NAND flash memory for storing and executing real-time programs in multitasking environments. In order to execute multiple real-time tasks stored in NAND flash memory with the minimal usage of expensive RAM, the mRT-PLRU is optimally configured in two steps. In the first step, the per-task analysis finds the function of RAM size versus execution time (and the corresponding optimal pinning/LRU combination) for each individual task. Using these functions for all the tasks as inputs, the second-step called a stochastic-analysis-in-loop optimization conducts an iterative convex optimization with the stochastic analysis for the probabilistic schedulability check. As a result, the optimization loop can optimally determine the RAM sizes for multiple tasks such that their deadlines are probabilistically guaranteed with the minimal size of total RAM. The usefulness of the developed technique is intensively verified through both simulation and actual implementation. Our experimental study shows that mRT-PLRU can save up to 80 percent of RAM required by the industry-common shadowing approach. | - |
dc.publisher | IEEE COMPUTER SOC | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON COMPUTERS | - |
dc.subject | STOCHASTIC-ANALYSIS | - |
dc.subject | SYSTEMS | - |
dc.title | mRT-PLRU: A General Framework for Real-Time Multitask Executions on NAND Flash Memory | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TC.2012.33 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON COMPUTERS, v.62, no.4, pp.758 - 771 | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000315959200010 | - |
dc.identifier.scopusid | 2-s2.0-84874839513 | - |
dc.citation.endPage | 771 | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 758 | - |
dc.citation.title | IEEE TRANSACTIONS ON COMPUTERS | - |
dc.citation.volume | 62 | - |
dc.contributor.affiliatedAuthor | Kim, Kanghee | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Soft real-time programs | - |
dc.subject.keywordAuthor | NAND flash memory | - |
dc.subject.keywordAuthor | multitasking | - |
dc.subject.keywordAuthor | paging | - |
dc.subject.keywordAuthor | mRT-PLRU | - |
dc.subject.keywordPlus | STOCHASTIC-ANALYSIS | - |
dc.subject.keywordPlus | SYSTEMS | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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