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Linearization Method Using Variable Capacitance in Inter-Stage Matching Networks for CMOS Power Amplifier
- Issue Date
- Jun-2019
- Publisher
- 한국전기전자학회
- Keywords
- AM distortion; linearity; power amplifier; power detector; pre-distortion; virtual ground
- Citation
- 전기전자학회논문지, v.23, no.2, pp.454 - 460
- Journal Title
- 전기전자학회논문지
- Volume
- 23
- Number
- 2
- Start Page
- 454
- End Page
- 460
- ISSN
- 1226-7244
- Abstract
- In this paper, a watt-level 2.4-GHz RFCMOS linear power amplifier (PA) with pre-distortion method usingvariable capacitance with respect to input power is demonstrated. The proposed structure is composed of a powerdetector and a MOS capacitor to improve the linearity of the PA. The pre-distortion based linearizer is embeddedin the two-stage PA to compensate for the gain compression in the amplifier stages, it also improves the outputP1dB by approximately 1 dB. The simulation results demonstrate a 1-dB gain compression power of 30.81 dBmat 2.4-GHz, and PAE is 29.24 % at the output P1dB point.
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Related Researcher
- Park, Chang kun
- College of Information Technology (Department of Electronic Engineering)