Design of a K-Band High-Linearity Asymmetric SPDT CMOS Switch Using a Stacked Transistor
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Taehun | - |
dc.contributor.author | Lee, Hui Dong | - |
dc.contributor.author | Park, Bonghyuk | - |
dc.contributor.author | Jang, Seunghyun | - |
dc.contributor.author | Kong, Sunwoo | - |
dc.contributor.author | Park, Changkun | - |
dc.date.accessioned | 2023-01-02T05:40:03Z | - |
dc.date.available | 2023-01-02T05:40:03Z | - |
dc.date.created | 2023-01-02 | - |
dc.date.issued | 2022-12 | - |
dc.identifier.issn | 1531-1309 | - |
dc.identifier.uri | http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/42977 | - |
dc.description.abstract | This study presents a high-linearity K-band single-pole double-throw (SPDT) switch with asymmetric topology in a 65-nm CMOS process for 5G applications. To simultaneously obtain high power-handling capability and high isolation in the Tx and Rx modes, respectively, we propose an SPDT switch using asymmetric topology and the stacked-transistor technique. In both the Tx/Rx modes, the proposed SPDT switch operates with an insertion loss of less than 2.1 dB and isolation better than 22.5 dB in the frequency range 20-25 GHz. At 22 GHz, the measurement results of the input 1-dB compression point (IP1dB) are 32.5 and 4.7 dBm in Tx and Rx modes, respectively. The chip core size of the proposed SPDT switch is 0.03 mm(2). | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
dc.title | Design of a K-Band High-Linearity Asymmetric SPDT CMOS Switch Using a Stacked Transistor | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/LMWC.2022.3192440 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.32, no.12, pp.1443 - 1446 | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000833062000001 | - |
dc.identifier.scopusid | 2-s2.0-85135762416 | - |
dc.citation.endPage | 1446 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 1443 | - |
dc.citation.title | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
dc.citation.volume | 32 | - |
dc.contributor.affiliatedAuthor | Park, Changkun | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9844166 | - |
dc.type.docType | Article; Early Access | - |
dc.description.isOpenAccess | N | - |
dc.subject.keywordAuthor | Insertion loss | - |
dc.subject.keywordAuthor | Loss measurement | - |
dc.subject.keywordAuthor | Switching circuits | - |
dc.subject.keywordAuthor | Transistors | - |
dc.subject.keywordAuthor | Switches | - |
dc.subject.keywordAuthor | Logic gates | - |
dc.subject.keywordAuthor | Semiconductor device measurement | - |
dc.subject.keywordAuthor | CMOS | - |
dc.subject.keywordAuthor | high linearity | - |
dc.subject.keywordAuthor | K-band | - |
dc.subject.keywordAuthor | millimeter-wave (mm-wave) | - |
dc.subject.keywordAuthor | single-pole double-throw (SPDT) | - |
dc.subject.keywordAuthor | switch | - |
dc.subject.keywordPlus | TRANSCEIVER | - |
dc.subject.keywordPlus | PHASE | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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