Conformally Gated Surface Conducting Behaviors of Single-Walled Carbon Nanotube Thin-Film-Transistors

Abstract

Semiconducting single-walled carbon nanotubes (s-SWCNTs) have gathered significant interest in various emerging electronics due to their outstanding electrical and mechanical properties. Although large-area and low-cost fabrication of s-SWCNT field effect transistors (FETs) can be easily achieved via solution processing, the electrical performance of the solution-based s-SWCNT FETs is often limited by the charge transport in the s-SWCNT networks and interface between the s-SWCNT and the dielectrics depending on both s-SWCNT solution synthesis and device architecture. Here, we investigate the surface and interfacial electro-chemical behaviors of s-SWCNTs. In addition, we propose a cost-effective and straightforward process capable of minimizing polymers bound to s-SWCNT surfaces acting as an interfering element for the charge carrier transport via a heat-assisted purification (HAP). With the HAP treated s-SWCNTs, we introduced conformal dielectric configuration for s-SWCNT FETs, which are explored by a carefully designed wide array of electrical and chemical characterizations with finite-element analysis (FEA) computer simulation. For more favorable gate-field-induced surface and interfacial behaviors of s-SWCNT, we implemented conformally gated highly capacitive s-SWCNT FETs with ion-gel dielectrics, demonstrating field-effect mobility of similar to 8.19 cm(2)/V.s and on/off current ratio of similar to 10(5) along with negligible hysteresis.