A Time-Based PAM-4 Transceiver Using Single Path Decoder and Fast-Stochastic Calibration Techniques

Abstract

The demand for high-speed transceivers for memory interfaces is steadily increasing. Recently, time-based (TB) transceivers [1]-[4] are obtaining more attention because of the implementation using simple digital logic gates assisted with a voltage-to-time converter (VTC) for power reduction. Since the VTC gain is inversely proportional to the supply voltage, the TB transceivers show higher power efficiency. However, VTC and logic gate delay are highly susceptible to PVT variations. This paper proposes a single path decoding scheme and linear VTC for PAM-4 signaling to enhance power efficiency and signal integrity (SI). We also present calibration techniques to improve the variation tolerance in the VTC gain, the single-to-differential amplifier (S2D), the time threshold (T-{TH}), and the decision feedback equalizer (DFE). © 2023 IEEE.