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A 0.9-mu A Quiescent Current High PSRR Low Dropout Regulator Using a Capacitive Feed-Forward Ripple Cancellation Technique
- Authors
- Guo, Tian; Kang, Woobin; Roh, Jeongjin
- Issue Date
- Oct-2022
- Publisher
- Institute of Electrical and Electronics Engineers
- Keywords
- Voltage; Transistors; Capacitors; Resistors; Regulators; Power demand; Transfer functions; Low dropout (LDO) regulator; low quiescent current LDO; power management integrated circuit (PMIC); power supply rejection ratio (PSRR)
- Citation
- IEEE Journal of Solid-State Circuits, v.57, no.10, pp 3139 - 3149
- Pages
- 11
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE Journal of Solid-State Circuits
- Volume
- 57
- Number
- 10
- Start Page
- 3139
- End Page
- 3149
- ISSN
- 0018-9200
1558-173X
- Abstract
- This article presents a high power supply rejection ratio (PSRR) low dropout (LDO) regulator with a low quiescent current. A low quiescent current capacitive feed-forward ripple cancellation (CFFRC) technique is proposed to cancel the power supply noise. With this technique, low power consumption is achieved via feed-forward capacitors and back-to-back pseudo-resistors bias. This design was fabricated using the 0.18-mu m CMOS technology. The entire proposed LDO consumes a quiescent current of 0.9 mu A. Compared with an LDO without enhancement, at the maximum load current of 200 mA, the measured PSRR has an enhancement of -22 dB at 1 MHz.
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Related Researcher
- Roh, Jeong jin
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)