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Heterogeneous 3D Sequential CFET with Ge (110) Nanosheet p-FET on Si (100) bulk n-FET by Direct Wafer Bonding
- Authors
- Kim, Seong Kwang; Lim, Hyeong-Rak; Jeong, Jaejoong; Lee, Seung Woo; Kim, Joon Pyo; Jeong, Jaeyoung; Kim, Bong Ho; Ahn, Seung-Yeop; Park, Youngkeun; Geum, Dae-Myoung; Kim, Younghyun; Baek, Yongku; Cho, Byung Jin; Kim, Sang Hyeon
- Issue Date
- Dec-2022
- Publisher
- IEEE
- Citation
- Technical Digest - International Electron Devices Meeting, IEDM, v.2022-December, pp 2011 - 2014
- Pages
- 4
- Indexed
- SCIE
SCOPUS
- Journal Title
- Technical Digest - International Electron Devices Meeting, IEDM
- Volume
- 2022-December
- Start Page
- 2011
- End Page
- 2014
- ISSN
- 2380-9248
- Abstract
- In this work, we demonstrated 3D sequential complementary field-effect-transistor (CFET) by direct wafer bonding (DWB) technique and a low-temperature process for monolithic 3D (M3D) integration using a high-performance top Ge (110)/<110> channel on bottom Si CMOS. Here, the maximum thermal budget was up to 400 degrees C during the fabrication of top Ge FET, allowing high-performance heterogenous Ge/Si CFET without damage to bottom Si FETs. Furthermore, we systematically investigated the mobility enhancement to channel orientation in thin Ge (110) nanosheet channel pFET. Low effective hole mass along <110> direction on Ge (110), which was calculated by the k center dot p method, provided record high mobility of approximately 400 cm(2)/V center dot s (corresponds to 743 cm(2)/V center dot s when normalized by footprint) among the reported Ge pFET with similar channel thicknesses at room temperature.
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Related Researcher
- Kim, Young hyun
- COLLEGE OF SCIENCE AND CONVERGENCE TECHNOLOGY (DEPARTMENT OF PHOTONICS AND NANOELECTRONICS)