Asynchronous SAR ADC with Self- Calibration based on Metastability Detector

Abstract

Successive- approximation- register (SAR) analog to digital converters (ADCs) have suffered from the linearity degraded by the mismatch of the capacitive digital-to-analog converter (CDAC). This paper proposes an asynchronous SAR ADC design scheme for the self- calibration based on metastability detector, so that the linearity can be significantly enhanced. Key signatures for the capacitor mismatches are predicted by the metastability detector used for this work. The metastability detector used for the calibration engine measures the nominal decision time for each bit, and then the additional switches are reconfigured to calibrate the mismatches of the CDA C. T he results of the behavioral simulation with a 12-bit S A R A DC showed the DNL and the INL errors have been improved by 0.96 LSBs for both. The SNDR and SFDR results were enhanced by 6.43 dB and 10.6 dB, respectively as well.