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LAYOUT COMPACTION FOR HIGH-PERFORMANCE/LARGE-SCALE CIRCUITS
- Authors
- Shin, Hyunchul
- Issue Date
- Jan-2024
- Publisher
- CRC Press
- Citation
- Advanced Routing of Electronic Modules, pp 313 - 345
- Pages
- 33
- Indexed
- SCOPUS
- Journal Title
- Advanced Routing of Electronic Modules
- Start Page
- 313
- End Page
- 345
- ISSN
- 978100357
- Abstract
- Layout compaction is the process of converting a symbolic layout or a sketch of a topological layout to a design-rule-correct mask layout with minimal area. It can be used in module generators as well as in postprocessors for placement and routing systems. Since manual compaction is tedious and error-prone, automatic layout compaction can significantly improve layout productivity and allow designers to explore more design alternatives in symbolic or functional level. © 1996 by Taylor & Francis Group, LLC.
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