Radiation reliability benefit of area-optimized interleaved flip-flop layout in 28 nm technology
- Authors
- Jeon, Sang Hoon; Lim, C.; Baeg, S.; Wen, S.; Wang, H.; Chen, L.
- Issue Date
- Sep-2019
- Publisher
- PERGAMON-ELSEVIER SCIENCE LTD
- Citation
- MICROELECTRONICS RELIABILITY, v.100-101, pp 1 - 6
- Pages
- 6
- Indexed
- SCI
SCIE
SCOPUS
- Journal Title
- MICROELECTRONICS RELIABILITY
- Volume
- 100-101
- Start Page
- 1
- End Page
- 6
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/2329
- DOI
- 10.1016/j.microrel.2019.113440
- ISSN
- 0026-2714
- Abstract
- In this work, an area-efficient interleaving layout scheme is proposed and tested for radiation reliability. The new layout scheme introduces area reduction opportunities by means of two flip-flops interleaved into one cell, resulting in a lower area compared to the reference FF. At the same time, the scheme efficiently utilizes a naturally occurring phenomenon of charge sharing and increased critical charge for soft error reliability. Two types of interleaving layouts, latch-based and inverter-based, were fabricated at 28 nm technology. The Interleaved Flip-Flops (IFFs) and a reference FF were tested for reliability using 5 MeV alpha particles. The results show strong effectiveness of IFFs against alpha particles.
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