An effective window based legalization algorithm for FPGA placement
- Authors
- Wang, Yu; Shin, Hyunchul
- Issue Date
- Dec-2013
- Publisher
- IEEE Computer Society
- Keywords
- Analytical placement; FPGA; Legalization
- Citation
- 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, pp 1 - 4
- Pages
- 4
- Indexed
- SCOPUS
- Journal Title
- 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013
- Start Page
- 1
- End Page
- 4
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/30573
- DOI
- 10.1109/ReConFig.2013.6732270
- ISSN
- 2325-6532
- Abstract
- Placement is one of the most important techniques in modern field-programmable gate array design. Generally, analytical placement method optimizes the wire-length in global stage while allowing overlaps between blocks and is followed by a legalization step to remove all overlaps. In this paper, we propose a window based legalization method to remove all overlaps and place all instances at legalized locations based on the architecture of the given field-programmable gate array. The experimental results show that our window based legalization method produces significantly better results than a conventional greedy method in terms of wire-length, total displacements, and CPU time. © 2013 IEEE.
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