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Optimizing Scrubbing Sequences for Advanced Computer Memories

Authors
Reviriego, PedroAntonio Maestro, JuanBaeg, Sanghyeon
Issue Date
Jun-2010
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Interleaving distance; memory; multiple cell upset (MCU); soft error
Citation
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v.10, no.2, pp 192 - 200
Pages
9
Indexed
SCIE
SCOPUS
Journal Title
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Volume
10
Number
2
Start Page
192
End Page
200
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/39780
DOI
10.1109/TDMR.2009.2039481
ISSN
1530-4388
1558-2574
Abstract
Advanced memories are designed using smaller geometries and lower voltages. This enables larger levels of integration and reduced power consumption, but makes memories more prone to suffer multibit soft errors. In this scenario, scrubbing is a fundamental technique to avoid the accumulation of errors, which would lead to a failure of the system. Scrubbing is usually implemented in advanced memories. However, when the percentage of multibit soft errors is significant, the scrubbing sequence (the order in which the memory is scrubbed) becomes important for the reliability of the system. In this paper, a new procedure to perform scrubbing is presented, which offers a significant improvement in the reliability. In the presence of multiple cell upsets, the mean time to failure could be doubled with respect to the traditional approach.
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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