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Experimental via characterization for the signal integrity verification of discontinuous interconnect line
- Authors
- Kim, Hyewon; Kim, Dongchul; Eo, Yungseon
- Issue Date
- Nov-2010
- Publisher
- IEEE
- Keywords
- Circuit model; Eye-diagram; S-parameter; Via
- Citation
- 2010 International SoC Design Conference, ISOCC 2010, pp.213 - 216
- Indexed
- OTHER
- Journal Title
- 2010 International SoC Design Conference, ISOCC 2010
- Start Page
- 213
- End Page
- 216
- ISSN
- 0000-0000
- Abstract
- Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process and measured using Vector Network Analyzer (VNA) up to 25 GHz. Then, by modeling a via as a circuit, its model parameters are determined. It is shown that the circuit model has excellent agreement with the measured S-parameters. The circuit performance of the lines with inter-layer vias is evaluated by using the developed circuit model. Thereby, it is shown that via may have a substantially deteriorative effect on the signal integrity of high-speed integrated circuits. ©2010 IEEE.
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Related Researcher
- EO, YUNG SEON
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)