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A 80%-Efficiency Digital Audio Amplifier with 4-Ω Speaker load Using 1-bit 4th-Order Delta-Sigma Modulation
- Issue Date
- Oct-2006
- Publisher
- 대한전자공학회
- Keywords
- Class-D; Delta-Sigma; efficiency; THD Dynamic Range
- Citation
- International SOC design conference, pp 95 - 98
- Pages
- 4
- Indexed
- OTHER
- Journal Title
- International SOC design conference
- Start Page
- 95
- End Page
- 98
- Abstract
- This paper presents the design of a single chip digital audio amplifier based on delta-sigma modulation and a power-efficient swithing output stage. The amplifier uses a fouth-order switched-capacitor high performance delta-sigma modulator with a 1bit quantizer and designed in standard 0.18um CMOS process.
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Related Researcher
- Roh, Jeong jin
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)