Device Scalability of InGaZnO TFTs for Next-Generation Displays

Abstract

Device scaling of thin-film transistors has only recently gained attention, as the need has grown for shorter channel lengths in hybrid integration applications as well as a performance enhancer in future displays. In this study, we study the device scalability of shortchannel top-gate oxide TFTs down to 1 mm, with particular focus on the carrier profile at the channel edges. We propose a carrier profile extraction method by utilizing comprehensive simulation fitting of the effective channel length, threshold voltage roll-off to the measured and extracted values. We find that the effective channel length plays an important role at short-channel lengths, and the scalability can be improved by adjusting the process-dependent carrier concentration profile.