Dislocation sink annihilating threading dislocations in strain-relaxed Si1-xGex layer
- Authors
- Choi, Sam-Jong; Kim, Il-Hwan; Park, Jun-Seong; Shim, Tae-Hun; Park, Jea Gun
- Issue Date
- Mar-2020
- Publisher
- IOP PUBLISHING LTD
- Keywords
- SiGe; dislocation; hydrogen ion implantation; annihilation process
- Citation
- NANOTECHNOLOGY, v.31, no.12, pp.1 - 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- NANOTECHNOLOGY
- Volume
- 31
- Number
- 12
- Start Page
- 1
- End Page
- 7
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/10663
- DOI
- 10.1088/1361-6528/ab58ab
- ISSN
- 0957-4484
- Abstract
- We proposed a dislocation sink technology for achieving Si1-xGex multi-bridge-channel field-effect-transistor beyond 5 nm transistor design-rule that essentially needs an almost crystalline-defect-free Si1-xGex channel. A generation of a dislocation sink via H+ implantations in a strain-relaxed Si0.7Ge0.3 layer grown on a Si substrate and a following annealing almost annihilate completely misfit and threading dislocations located near the interface between a relaxed Si0.7Ge0.3 layer and a Si substrate. A real-time (continuous heating from room temperature to 600 degrees C) in situ high-resolution-transmission-electron-microscopy and inverse-fast-Fourier-transform image observation at 1.25 MV acceleration voltage obviously demonstrated the annihilation process between dislocation sinks and remaining misfit and threading dislocations during a thermal annealing, called the [Si-I or Ge-I +V-Si or V-Ge -> Si1-xGex] annihilation process, where Si-I, Ge-I, V-Si, and V-Ge are interstitial Si, interstitial Ge, Si vacancy, and Ge vacancy, respectively. In particular, the annihilation process efficiency greatly depended on the dose of H+ implantation and annealing temperature; i.e. a maximum annihilation process efficiency achieved at 5 x 10(15) atoms cm(-2) and 800 degrees C.
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