An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS
- Authors
- Wang, Zhongkai; Choi, Minsoo; Lee, Kyoungtae; Park, Kwanseo; Liu, Zhaokai; Biswas, Ayan; Han, Jaeduk; Du, Sijun; Alon, Elad
- Issue Date
- Sep-2021
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- 28 nm; 4:1 multiplexer (MUX); Bandwidth; Berkeley Analog Generator (BAG); clock distribution; Clocks; Computer architecture; four-level pulse-amplitude modulation (PAM-4); Generators; Optical signal processing; Pulse generation; pulse generator; quarter-rate; SerDes; transmitter (TX); Voltage; wireline.
- Citation
- IEEE Journal of Solid-State Circuits, v.57, no.1, pp.1 - 11
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE Journal of Solid-State Circuits
- Volume
- 57
- Number
- 1
- Start Page
- 1
- End Page
- 11
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/141012
- DOI
- 10.1109/JSSC.2021.3109562
- ISSN
- 0018-9200
- Abstract
- This article presents a 200-Gb/s pulse amplitude-modulation four-level (PAM-4) and 100-Gb/s non-return-to-zero (NRZ) transmitter (TX) in 28-nm CMOS technology. To achieve the target data rate, the output bandwidth and swing of the proposed TX are optimized by minimizing the output capacitance of the 4:1 multiplexer (MUX) and driver stage with pull-up current sources and adopting a fully reconfigurable 5-tap feed-forward equalizer (FFE). The key circuit includes a segmented 8:4 MUX and 4:1 MUX/driver, a thermal encoder and retimer, and a flexible clock distribution network. Using the layout generated with Berkeley Analog Generator (BAG), the proposed TX achieves an eye opening with >52.9-mV eye height, 0.36 UI eye width, >98% RLM, and 4.63 pJ/b at 200-Gb/s PAM-4 signaling under >6-dB channel loss at 50 GHz, demonstrating the highest data rate achieved using a planar process.
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