Reduction in the Interfacial Trap Density of Al2O3/GaAs Gate Stack by Adopting High Pressure Oxidation
- Authors
- Lim, Hajin; Kim, Seongkyung; Kim, Joon Rae; Suh, Sungin; Song, Ji Hun; Lee, Nae-In; Jeong, Jae Kyeong; Lee, Nae-In
- Issue Date
- Oct-2014
- Publisher
- ELECTROCHEMICAL SOC INC
- Citation
- ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, v.3, no.12, pp.232 - 235
- Indexed
- SCIE
SCOPUS
- Journal Title
- ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
- Volume
- 3
- Number
- 12
- Start Page
- 232
- End Page
- 235
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/158867
- DOI
- 10.1149/2.0101412jss
- ISSN
- 2162-8769
- Abstract
- The high interfacial trap density in GaAsMOScapacitors is one of the critical issues for realizing highmobility field-effect transistors. This paper proposes a new approach involving the high pressure thermal oxidation (HPO) of GaAs and subsequent HF etching prior to the deposition of an Al2O3 dielectric film. The HPO-treated MOS capacitors exhibited better electrical properties, such as reduced hysteresis and frequency dispersion compared to those of the control capacitors. These improvements were attributed to their reduced interfacial trap density. The relevant rationale is discussed based on the suppression of the Ga2O3 layer between the Al2O3 dielectric and GaAs semiconductor, which resulted from the As excess and Ga deficient surface modification via HPO and subsequent HF etching.
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