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An ASIP approach for interpolation performance enhancement in HEVC decoder
- Authors
- Lee, Minkyu; Song, Yong Ho; Chung, Ki-Seok
- Issue Date
- Sep-2014
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- ASIP; HEVC; interpolation; motion compensation
- Citation
- Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014, pp.232 - 235
- Indexed
- SCOPUS
- Journal Title
- Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014
- Start Page
- 232
- End Page
- 235
- ISSN
- 0000-0000
- Abstract
- In this paper, an application-specific instruction-set processor (ASIP) implementation for interpolation operation for high efficiency video coding (HEVC) decoders is proposed. HEVC is a new video compression standard that has higher compression efficiency than the previous ones. The proposed ASIP is implemented on the XRC-D2MR processor by augmenting the instruction set architecture in Xtensa Tensilica processor using Tensilica instruction extension (TIE).
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