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A Study of Sputtered TiN Gate Electrode Etching with Various Wet Chemicals and Post Etch Annealing for Complementary Metal-Oxide-Semiconductor Device Integration Applications

Authors
Heo, Seung ChanYoo, DongjunChoi, Moon SukKim, DohyungChung, ChulwonChoi, Changhwan
Issue Date
Oct-2012
Publisher
IOP Publishing Ltd
Citation
Japanese Journal of Applied Physics, v.51, no.10, pp 1 - 5
Pages
5
Indexed
SCI
SCIE
SCOPUS
Journal Title
Japanese Journal of Applied Physics
Volume
51
Number
10
Start Page
1
End Page
5
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/164542
DOI
10.1143/JJAP.51.101203
ISSN
0021-4922
1347-4065
Abstract
Wet chemicals for etching sputtered TiN metal gate and post etch annealing on HfO2 and HfSiON gate dielectrics were studied with metal-oxide-semiconductor devices. Various wet solutions such as SC1 (NH4/H2O2/H2O = 1 : 2 : 5), SPM (H2SO4/H2O2 = 10 : 1), and H2O2 were employed to etch the sputtered TiN. Difference in equivalent oxide thickness (EOT) is negligible among etchants while the lowest leakage current density (J(g)) is attained with only SPM solution. Even though SPM treatment shows relative poor surface morphologies compared to H2O2 process, difference in J(g) is mainly affected by the amount of absorbed Ti into high-k gate dielectrics during wet etch process. Lower J(g) using SPM is attributable to the reduced amount of Ti-adsorption due to additional H2SO4 acid in wet chemical solution, which is confirmed by total reflection X-ray fluorescence. Post etch annealing on high-k layer improves film qualities such as suppressed defects-less frequency dependence-and lowers J(g) further while EOT is slightly increased by about 0.2nm due to SiO2 interfacial regrowth. HfSiON gate dielectric shows stronger immunity against TiN wet etch compared with HfO2. Thus, appropriate etchant and post annealing for the selective TiN etching are carefully considered to suppress defects and J(g) for attaining complementary metal-oxide-semiconductor (CMOS) device.
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