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PRAM and NAND flash hybrid architecture based on hot data detection

Authors
Park, Jung SikKim, Hi-SeokChung, Ki SeokHan, Tae Hee
Issue Date
Aug-2010
Publisher
IEEE
Keywords
Hot data detection; Hybrid architecture; NAND flash; PRAM; SW architecture
Citation
ICMEE 2010 - 2010 2nd International Conference on Mechanical and Electronics Engineering, Proceedings, v.1, pp.V193 - V197
Indexed
SCOPUS
Journal Title
ICMEE 2010 - 2010 2nd International Conference on Mechanical and Electronics Engineering, Proceedings
Volume
1
Start Page
V193
End Page
V197
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/174318
DOI
10.1109/ICMEE.2010.5558587
ISSN
0000-0000
Abstract
NAND flash memory is widely used in embedded systems, as it has various advantages, including low power consumption, a small footprint, and non-volatility. However, it has some limitations, for example, the units of its read/write operation and erase operation do not match, which lowers its performance. Furthermore, it cannot perform the in-place overwrite operation and has a limited number of erase operations. Thus, additional software techniques are required to use NAND flash memory, and numerous studies were recently conducted on hybrid architecture using NAND flash and the next-generation non-volatile memory. In this paper, it is suggested that a hot data detection layer be added to a software layer based on the NAND flash hybrid architecture with PRAM (Phase-changed RAM). The hot data detection layer is used to detect hot data and then place this data on PRAM. The simulation results showed that the read performance of the suggested method improved by 12.74%, and its write performance by 17.78% compared to existing methods. The number of erase operations was also reduced by 8.18%.
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