Capacitive Neural Network Using Charge-Stored Memory Cells for Pattern Recognition Applications

Abstract

We report on capacitive neural network using charge-stored memory cells. Threshold voltage ( ${V}_{\text {th}}$ )-adjusted memory cells are used as capacitors with different capacitances in the synapse array. The capacitor array detects output voltage difference induced by capacitive coupling from input voltages when outputting the data of weighted memory cells in a read operation. Thus, power consumption is significantly improved. To verify the validity of the capacitor synapse array, MNIST simulations are performed. Though misclassification rate is slowly saturated compared to that of the linear synapse because of the non-linear weights, blow 1 % difference in misclassification rate is successfully obtained.