Ferroelectric-Gate Field-Effect Transistor Memory With Recessed Channel
- Authors
- Lee, Kitae; Bae, Jong-Ho; Kim, Sihyun; Lee, Jong-Ho; Park, Byung-Gook; Kwon, Daewoong
- Issue Date
- Aug-2020
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- FeFET endurance; FeFET program/erase speed; ferroelectric-gate FET (FeFET); Recessed channel
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.41, no.8, pp.1201 - 1204
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 41
- Number
- 8
- Start Page
- 1201
- End Page
- 1204
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190135
- DOI
- 10.1109/LED.2020.3001129
- ISSN
- 0741-3106
- Abstract
- We demonstrate a novel ferroelectric-gate field effect transistor with recessed channel (R-FeFET) to improve memory window (MW), program/erase speed, long-time retention, and endurance simultaneously. Based on technology computer-aided design (TCAD) simulations including calibrated ferroelectric material (FE) parameters, it is revealed that the polarization is enhanced by the larger electric field (e-field) across the FE compared to a conventional planar FeFET, resulting in the wider MW and the faster program/erase speed. Moreover, the endurance/retention of the R-FeFET is expected to be improved as the e-field across the SiO2 interlayer is significantly reduced.
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