STT-MRAM Read-circuit with Improved Offset Cancellation
- Authors
- Lee, Dong-Gi; Park, Sang-Gyu
- Issue Date
- Jun-2017
- Publisher
- IEEK PUBLICATION CENTER
- Keywords
- STT-MRAM; read-circuit; offset cancellation; sensing margin
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.17, no.3, pp.347 - 353
- Indexed
- SCIE
SCOPUS
KCI
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 17
- Number
- 3
- Start Page
- 347
- End Page
- 353
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19669
- DOI
- 10.5573/JSTS.2017.17.3.347
- ISSN
- 1598-1657
- Abstract
- We present a STT-MRAM read-circuit which mitigates the performance degradation caused by offsets from device mismatches. In the circuit, a single current source supplies read-current to both the data and the reference cells sequentially eliminating potential mismatches. Furthermore, an offset-free pre-amplification using a capacitor storing the mismatch information is employed to lessen the effect of the comparator offset. The proposed circuit was implemented using a 130-nm CMOS technology and Monte Carlo simulations of the circuit demonstrate its effectiveness in suppressing the effect of device mismatch.
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