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Low-Power Encoding for PAM-3 DRAM Bus
- Authors
- Nam, Jonghyeon; Han, Jaeduk; Kim, Hokeun
- Issue Date
- Jul-2024
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Data encoding; DRAM bus; Low power; PAM-3
- Citation
- Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024, pp 1 - 4
- Pages
- 4
- Indexed
- SCOPUS
- Journal Title
- Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024
- Start Page
- 1
- End Page
- 4
- ISSN
- 2575-4874
2575-4890
- Abstract
- The 3-level pulse amplitude modulation (PAM-3) signaling is expected to be widely used in memory interfaces for its greater voltage margins compared to PAM-4. To maximize the benefit of PAM-3, we propose three low-power data encoding algorithms: PAM3-DBI, PAM3-MF, and PAM3-SORT. With the DRAM memory traces from the gem5 computer architecture simulator running benchmarks, we evaluate the energy efficiency of our three PAM-3 encoding techniques. The experimental results show the proposed algorithms can reduce termination power for high-speed memory links significantly by 41% to 90% for benchmark programs.
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Related Researcher
- Han, Jaeduk
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)