Stabilization of Morphotropic Phase Boundary in Hafnia via Microwave Low-Temperature Crystallization Process for Next-Generation Dynamic Random Access Memory Technology
- Authors
- Shin, Hunbeom; Kim, Giuk; Lee, Sujeong; Choi, Hyojun; Lee, Sangho; Lee, Sangmok; Nam, Yunseok; Kang, Geonhyeong; Kim, Hyungjun; Ahn, Jinho; Jeon, Sanghun
- Issue Date
- Sep-2024
- Publisher
- Wiley - VCH Verlag GmbH & CO. KGaA
- Keywords
- DRAM technology; HfO2; low equivalent oxide thickness; low leakage current; morphotropic phase boundary
- Citation
- physica status solidi (RRL) - Rapid Research Letters, v.18, no.9, pp 1 - 7
- Pages
- 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- physica status solidi (RRL) - Rapid Research Letters
- Volume
- 18
- Number
- 9
- Start Page
- 1
- End Page
- 7
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/207907
- DOI
- 10.1002/pssr.202400108
- ISSN
- 1862-6254
1862-6270
- Abstract
- The morphotropic phase boundary (MPB), which arises from the combination of antiferroelectric and ferroelectric phases, demonstrates the highest dielectric constant (κ) compared to other phases. This emphasizes its potential as a leading contender for dielectric films in future dynamic random access memory (DRAM) capacitors. MPB-based high-κ materials using hafnia have shown a trade-off between equivalent oxide thickness (EOT) and leakage current density (Jleak) when the crystallization temperature increases with scaling the thickness. Herein, a microwave annealing (MWA) method that can achieve low-temperature crystallization below 350 °C is employed. The purpose of this method is to mitigate the trade-off relationships and achieve the strict criteria of current DRAM capacitors. These criteria include low EOT (less than 4 Å) and Jleak (less than 10−7 A cm−2 at 0.8 V) characteristics. The MWA is capable of relatively low-temperature annealing by supplying energy to the films through both thermal energy and dipole vibration energy. As a result, a record-low EOT of 3.76 Å and a low leakage current characteristic of 4.2 × 10−8 A cm−2 at 0.8 V are achieved concurrently. It is confident that the research can be important in addressing the challenges associated with reducing the size of next-generation DRAM capacitors.
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