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An Area-Efficient Mixed-Precision Accelerator with Output-Error-Based Quantization for ViT

Authors
Park, SubinAhn, JuhyukRho, SoominKim, KwangraeChung, Ki-Seok
Issue Date
Jan-2026
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
Hardware Accelerator; Mixed-Precision Quantization; Vision Transformer
Citation
International SoC Design Conference 2025, ISOCC 2025 - Proceedings of Technical Papers, pp 1 - 2
Pages
2
Indexed
SCOPUS
Journal Title
International SoC Design Conference 2025, ISOCC 2025 - Proceedings of Technical Papers
Start Page
1
End Page
2
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/213195
DOI
10.1109/ISOCC66390.2025.11330033
ISSN
2163-9612
2472-9655
Abstract
Vision Transformer (ViT) has achieved remarkable performance in computer vision tasks. However, its large number of parameters poses challenges for deployment on resourceconstrained devices. Mixed-precision quantization is widely used to reduce the model size. To improve accuracy while minimizing the use of high bit-width precision, selecting the appropriate precision for each tensor is crucial. In this paper, we propose a precision selection strategy that leverages the mean squared error of linear operation outputs to improve accuracy with minimal use of high bit-width tensors. Moreover, we propose a processing element that shares most of its internal resources to support mixed precision. On ViT-Base with ImageNet, our method achieves a 0.706% accuracy improvement and 1.83× speedup over a prior work with identical area constraints.
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