Multi-level resistance uniformity of double pinned perpendicular magnetic-tunnel-junction spin-valve depending on top MgO barrier thickness
- Authors
- Jun, Han-Sol; Choi, Jin-Young; Ashiba, Kei; Jung, Sun-Hwa; Park, Miri; Baek, Jong-Ung; Shim, Tae-Hun; Park, Jea Gun
- Issue Date
- Jun-2020
- Publisher
- AMER INST PHYSICS
- Citation
- AIP ADVANCES, v.10, no.6, pp.1 - 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- AIP ADVANCES
- Volume
- 10
- Number
- 6
- Start Page
- 1
- End Page
- 7
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/9760
- DOI
- 10.1063/5.0007064
- ISSN
- 2158-3226
- Abstract
- In order to utilize perpendicular spin-torque-transfer magnetic-random-access-memory (p-STT MRAM) as a storage class memory, the achievement of performing multi-level-cell (MLC) operation is important in increasing the integration density of p-STT MRAM. For a double pinned perpendicular magnetic tunneling junction spin-valve performing MLC (i.e., four-resistance level) operation, the uniformity in the resistance difference between four-level resistances was investigated theoretically and experimentally. The uniformity in the resistance difference between four-level resistances was strongly dependent on the top MgO tunneling-barrier thickness. Particularly, the most uniform resistance difference between four resistance states could be achieved at a critical top-MgO tunneling thickness (i.e., similar to 1.15 nm).
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