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Bias-stress-induced trapping effect of high-voltage field-plated AlGaN/GaN-on-Si heterostructure FETs

Authors
Choi, ShinhyukLee, Jae-GilCha, Ho-YoungKim, Hyungtak
Issue Date
Mar-2013
Publisher
KOREAN PHYSICAL SOC
Keywords
Channel temperature; DC stress; Electron trapping; Field plate; GaN; High voltage; Inverse piezoelectric effect; Reliability
Citation
JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.62, no.6, pp.954 - 958
Journal Title
JOURNAL OF THE KOREAN PHYSICAL SOCIETY
Volume
62
Number
6
Start Page
954
End Page
958
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/17174
DOI
10.3938/jkps.62.954
ISSN
0374-4884
Abstract
AlGaN/GaN heterostructure field effect transistors (HFETs) with a gate field plate were fabricated on GaN-on-Si substrates. Devices demonstrated high breakdown voltages over 500 V for high-voltage switching operation. We applied a DC stress under on-state and off-state conditions to investigate the degradation characteristics. Degradations of the output and the transfer characteristics were observed after stress tests and recovered after 10 days in ambient storage. The electron trapping effect played a major role in the observed degradations. We also observed a correlation between the field-plate length and the degradation. The technology computer aided design (TCAD) simulation indicated that this dependence could be attributed to a change in the electric field distribution in the channel that depended on the field-plate dimension.
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