Electrochemical process for through via 3D SiP without CMP and lithographic processes
- Authors
- Lee, S.-E.; Kim, S.-H.; Moon, Y.-S.; Ko, Y.-K.; Park, K.-J.; Lee, J.-H.
- Issue Date
- 2008
- Keywords
- Copper via filling; Electroless Cu/Sn bump; Electropolishing; TSV 3D SiP
- Citation
- Proceedings - 2008 International Symposium on Microelectronics, IMAPS 2008, pp.434 - 437
- Journal Title
- Proceedings - 2008 International Symposium on Microelectronics, IMAPS 2008
- Start Page
- 434
- End Page
- 437
- URI
- https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/23485
- ISSN
- 0000-0000
- Abstract
- A serial electrochemical process consist of copper via filling, electropolishing, electroless copper plating and electroless tin plating is presented for the TSV 3D SiP application. Defect-free copper via filling was achieved by controlling current modes and additives. After via filling, electropolishing was performed to planarize over-plated copper. Electropolishing within the potential of mass-transfer region and with the assistance of additives, fine polished surface without thickness disparity was achieved. For bump formation process, electroless copper and tin plating which is a self-aligned process was applied. Consequently, Cu/Sn bump on via patterned wafer was obtain without using the conventional CMP and lithographic processes.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > Materials Science and Engineering Major > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.