Resistive random-access memory with an a-Si/SiNx double-layer
- Authors
- Kwon, Hui Tae; Lee, Won Joo; Choi, Hyun-Seok; Wee, Daehoon; Park, Yu Jeong; Kim, Boram; Kim, Min-Hwi; Kim, Sungjun; Park, Byung-Gook; Kim, Yoon
- Issue Date
- Aug-2019
- Publisher
- PERGAMON-ELSEVIER SCIENCE LTD
- Keywords
- Resistive random-access memory (RRAM); Silicon nitride (Si3N4); MIS (Metal-Insulator-Semiconductor) RRAM
- Citation
- SOLID-STATE ELECTRONICS, v.158, pp 64 - 69
- Pages
- 6
- Journal Title
- SOLID-STATE ELECTRONICS
- Volume
- 158
- Start Page
- 64
- End Page
- 69
- URI
- https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/72122
- DOI
- 10.1016/j.sse.2019.05.014
- ISSN
- 0038-1101
1879-2405
- Abstract
- Resistive random-access memory (RRAM) with a Ni/SiNx/a-Si/p(+)-Si structure is presented. In contrast to RRAM devices based on high-k materials, the proposed Si-based device is more attractive and promising because the SiNx and a-Si layers have full compatibility with conventional complementary metal-oxidesemiconductor technology. The proposed device is compared to a control device with a single layer of SiNx. A conduction path containing Si dangling bonds (traps) can be generated in both the SiNx and a-Si layers. The conduction path in each layer can be controlled by the compliance current during the forming process. For high compliance current mode, the double-layer device has a higher ON/OFF ratio (similar to 10(4)) and lower leakage current (similar to 10(-9) A) than the single-layer device. For low compliance current mode, better non-linearity (similar to 10(3)) can be obtained when a 1/2 read bias scheme is applied to the cross-point array.
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Collections - College of ICT Engineering > School of Electrical and Electronics Engineering > 1. Journal Articles
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