Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2
- Authors
- Jo, Yoo Jin; Moon, Jeong Hyun; Seok, Ogyun; Bahng, Wook; Park, Tae Joo; Ha, Min-Woo
- Issue Date
- Apr-2017
- Publisher
- 대한전자공학회
- Keywords
- C-V; effective oxide charge density; gate leakage current; hysteresis; MOS; SiC; SiO2
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.17, no.2, pp.265 - 270
- Indexed
- SCIE
SCOPUS
KCI
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 17
- Number
- 2
- Start Page
- 265
- End Page
- 270
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/10067
- DOI
- 10.5573/JSTS.2017.17.2.265
- ISSN
- 1598-1657
- Abstract
- 4H-SiC has attracted attention for highpower and high-temperature metal-oxide-semicon-ductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above 1000 degrees C, thermal oxidation initiates SiO2 layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown SiO2 on 4H-SiC is limited by high oxide charges due to carbon clusters at the SiC/SiO2 interface and near-interface states in SiO2; this can be resolved via lowtemperature deposition. In this study, lowtemperature SiO2 deposition on a Si substrate was optimized for SiO2/4H-SiC MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The SiO2/4H-SiC MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.
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